2026-05-18 — views $RMBS · Rambus · HBM4 PHY · DDR5 RCD · CXL · PCIe Gen6 · Security
Rambus (RMBS) — memory + interface IP under every DDR5 RDIMM and HBM stack
Rambus is the IP layer under every DDR5 RDIMM/MRDIMM (RCD), every HBM3/HBM4 stack (controller + PHY), and increasingly Gen6 PCIe PHYs. Smaller than ARM but pure royalty/license — the silent picks-and-shovels on every AI server.
Rambus (NASDAQ: RMBS) is the IP layer under every DDR5 RDIMM, every HBM3/HBM4 stack, and an increasing share of Gen6 PCIe PHYs. The business doesn’t ship its own packaged silicon — it licenses memory and interface IP to memory vendors, ASIC designers, and hyperscalers’ in-house silicon teams.
What Rambus actually sells
| Product line | What it is | Who ships it |
|---|---|---|
| DDR5 RCD (Register Clock Driver) | Mandatory chip in every server RDIMM/MRDIMM module | Micron, SK Hynix, Samsung DIMM modules → every server vendor |
| HBM3 / HBM4 controller + PHY | The interface IP that talks to a HBM stack | NVIDIA, AMD, Intel, and hyperscaler ASIC designers |
| CXL 3.0 controllers | Memory expansion + pooling fabric | CXL memory device vendors + custom server SoCs |
| PCIe Gen6 / Gen7 PHY | Physical layer for Gen6 PCIe (32 GT/s) | Adopters of PCIe Gen6 — overlaps with ALAB Aries territory |
| Security IP | Root-of-Trust, crypto accelerator IP | Confidential-compute platforms, automotive SoCs |
Why Rambus is the silent picks-and-shovels
Every AI server built in 2026 contains a Rambus royalty payment, embedded in the chip BOM:
- Memory side: DDR5 RDIMM/MRDIMM RCD chip — every 96GB/128GB server module ships one. Hyperscalers ordering hundreds of thousands of DIMM modules pay Rambus per module.
- HBM side: Every NVIDIA H100/H200/B100/B200 has 4-8 stacks of HBM. Each HBM stack uses a controller + PHY block licensed (often via the HBM vendor’s own design license to Rambus). The PHY IP collects royalty per HBM stack shipped.
- PCIe interconnect side: Gen5 PCIe PHY is widespread. Gen6 PHY (32 GT/s) is the new IP, taped out by Rambus in 2026 and licensable to hyperscalers’ custom SoCs.
It’s the same picks-and-shovels theme as ALAB/CRDO — just one layer deeper, baked into the silicon rather than shipped as standalone chips.
The MRDIMM moment
The non-obvious 2026 catalyst is MRDIMM (Multiplexed Rank DIMM). MRDIMM is the next-gen DDR5 form factor that doubles per-DIMM bandwidth without changing the connector. Two characteristics:
- Every MRDIMM module needs an RCD + new “MUX” chip — and Rambus is the leading licensor of both.
- Hyperscalers are MRDIMM’s first volume customer, because memory bandwidth is the bottleneck on every CPU-bound AI inference workload.
The transition from RDIMM → MRDIMM is the kind of mandatory upgrade that boosts Rambus per-module royalty by ~2x without requiring new customer wins.
HBM4 and the AI accelerator dependency
HBM4 doubles HBM3’s per-stack capacity (24-36GB → 48-72GB) and bandwidth (~1TB/s → ~2TB/s). It’s mandatory on Blackwell-class successors. Rambus has been licensing its HBM4 controller + PHY IP to multiple silicon vendors through 2025-2026. Every HBM4 stack that ships pays a Rambus royalty.
The math: if 5M Blackwell-class GPUs ship in 2026 × 8 HBM stacks per GPU = 40M HBM stacks, each carrying a controller IP royalty. Even at $1-5/stack, that’s $40-200M annualized just from HBM4 — and HBM5 is on the roadmap.
Comparing to ALAB and CRDO
| ALAB | CRDO | Rambus | |
|---|---|---|---|
| Sells | Packaged silicon (retimer + CXL + fabric switch) | AECs + SerDes IP | Memory IP + interface IP |
| Customer | Hyperscaler + GPU vendor | Hyperscaler | Memory + silicon vendor |
| Royalty model | No (chip sale) | Partial (IP + chip) | Pure IP/royalty |
| Margin | Hardware gross margin | Mixed | ~95% gross margin |
| Volume scaling | Per-rack (lower volume, higher ASP) | Per-cable (mid-volume) | Per-DIMM + per-HBM-stack (massive volume) |
Rambus is the lowest-visibility but highest-volume of the three when measured by per-unit royalty events.
Risks
- Memory market cyclicality. When DRAM oversupply hits, server DIMM shipment volumes drop. Rambus revenue is correlated to DIMM unit shipments, not DRAM ASP.
- Customer in-house IP. Large hyperscalers (e.g., Microsoft, Amazon) have in-house silicon teams; some prefer building their own HBM controllers rather than licensing. This caps royalty share to ~70-80% of total HBM volume rather than 100%.
- Smaller market cap. RMBS is ~$1B vs ARM at ~$140B+ — less liquidity, more volatile to single-customer wins/losses.
Practitioner note
For builders deploying AI infrastructure:
- You’re paying Rambus every time you provision an HBM-heavy instance. Not actionable per-app, but worth understanding: H100/H200/B100 instance pricing embeds memory-controller IP cost in the per-hour rate.
- MRDIMM-enabled servers are coming in 2H26. If your inference workloads are memory-bandwidth bound (LLM serving, embeddings), MRDIMM-class hardware will be in cloud SKUs by late 2026. Plan refresh accordingly.
- For investors: Rambus is the lowest-visibility, highest-volume infrastructure IP name. It’s the bet on AI server volume × memory intensity, without GPU-specific concentration risk.
The under-considered angle: Rambus is the closest thing to a pure royalty on “more memory” that exists in public markets. If AI inference continues to scale toward memory-bandwidth-bound workloads (LLM serving > training), the per-server royalty count rises faster than AI training capex. Watch the MRDIMM ramp and HBM4 first-volume disclosures from memory vendors in 2H26 — those are the leading indicators.