AI Infrastructure IP
Picks-and-shovels for hyperscale AI: connectivity silicon, SerDes, retimers, AECs, optical — the IP that wires the cluster. Astera Labs, Credo, Marvell, Synopsys.
2026-06-16 $EQIX · Equinix / Cisco / NVIDIA
Equinix, Cisco, and NVIDIA partner to deploy Secure AI Factories across Equinix's global colocation footprint
Equinix, Cisco, and NVIDIA announced a 3-way partnership to deploy the Cisco Secure AI Factory blueprint across Equinix global colos. Enterprise tenants get standardized AI compute plus a co-developed P.A.T.H. Lab to validate deployments before full colocation commitment.
2026-06-12 $VRT · Vertiv Holdings
Vertiv closes ThermoKey acquisition — adding dry coolers and microchannel heat rejection to its AI data center thermal stack
Vertiv closed its ThermoKey S.p.A. acquisition on June 12, adding Italian-made dry coolers and microchannel heat-rejection to its AI-factory thermal portfolio. The deal extends EMEA manufacturing and positions Vertiv for GPU-cluster liquid-cooling density demands.
2026-06-09 $AVGO · Broadcom
Broadcom's networking quarter: AI silicon hits $10.8B as Tomahawk 6 passes a year of shipping and a 200-terabit switch tapes out
Broadcom's Q2 FY2026 put AI semiconductor revenue at $10.8B, up 143% YoY, with networking nearly 40% of it. Hock Tan said the 100-terabit Tomahawk 6 has shipped for over a year and a 200-terabit successor tapes out this quarter; Q3 AI guidance is $16B, up over 200% YoY.
2026-06-08 $NVDA · NVIDIA
Co-packaged optics enters NVLink Fusion: Ayar Labs and Lightmatter join NVIDIA's scale-up ecosystem in the same week
In two announcements one day apart, Ayar Labs (June 2) and Lightmatter (June 3, 2026) joined NVIDIA's NVLink Fusion ecosystem, making their co-packaged-optics engines compatible with NVIDIA's SerDes and switch silicon. It signals photonics moving into the scale-up domain that
2026-06-07 $CRDO · Credo Technology Group
Credo's $437M quarter and the AEC-to-optical pivot: an interconnect leader bets the next leg on photonics
Credo Technology reported Q4 FY2026 revenue of $437.0M (+157% YoY, +7.4% QoQ) and non-GAAP EPS of $1.16 vs $1.05 expected, capping a $1.335B fiscal year. But the headline is forward-looking: management guided to 80%+ FY2027 growth and called an optical inflection, targeting
2026-06-07 $AMD · AMD / UALink Consortium
UALink's Switch-Silicon Gap: Why AMD's First Helios Racks Ship Over Ethernet
AMD's Helios MI455X rack, detailed on June 4, runs its 72-GPU scale-up domain over UALink-over-Ethernet rather than native UALink switches, because switch ASICs from Astera Labs, Auradine, Enfabrica, XConn and Upscale AI are still in validation. The result is a live test of
2026-06-06 $ALAB · Astera Labs
Astera Labs' 320-Lane Scorpio X-Series Pushes a Memory-Semantic Scale-Up Fabric Into PCIe 6
Astera Labs unveiled the Scorpio X-Series 320 Lane Smart Fabric Switch on May 5, 2026, a high-radix PCIe 6 scale-up switch with in-network compute that targets the merchant scale-up silicon market it pegs at $20 billion by 2030, with production ramp in the second half of 2026.
2026-05-29 $SIFV · SiFive
SiFive P570 Gen 3 — RISC-V core for AI and edge applications
SiFive unveiled the Performance P570 Gen 3, a 64-bit RVA23-compliant RISC-V processor targeting edge AI, consumer, and IoT markets. The core delivers 7–13% SpecInt improvements and up to 21X gains on AI workloads versus its predecessor, while reducing dynamic power by 13%.
2026-05-19 $RMBS · Rambus + Synopsys
HBM controller race — Rambus vs Synopsys for AI accelerator memory IP
The HBM controller IP race between Rambus (RMBS) and Synopsys (SNPS) decides which AI accelerator silicon ships on time. Every NVIDIA / AMD / hyperscaler ASIC carries 4-8 HBM stacks; each stack uses controller + PHY IP licensed from one of these two.
2026-05-18 $ARM · ARM Holdings
ARM Holdings — the IP layer under every smartphone and increasingly every AI server
ARM licenses CPU IP under 99%+ smartphone SoCs and is the structural read on AI-server CPU shift (NVIDIA Grace, AWS Graviton, Apple). Arm v9 royalty runs 30-50% above v8 per chip — the v9 mandate is the pricing event.
2026-05-18 $CDNS · Cadence
Cadence (CDNS) — EDA + Tensilica IP, the co-leader of the duopoly that designs every AI chip
Cadence is the #2 EDA vendor and co-leader of the design-tool duopoly with Synopsys. Cerebrus AI place-and-route + JedAI platform + Tensilica DSP/AI cores. Every Apple A-series, Qualcomm, and Tesla FSD chip uses Cadence tools.
2026-05-18 $RMBS · Rambus
Rambus (RMBS) — memory + interface IP under every DDR5 RDIMM and HBM stack
Rambus is the IP layer under every DDR5 RDIMM/MRDIMM (RCD), every HBM3/HBM4 stack (controller + PHY), and increasingly Gen6 PCIe PHYs. Smaller than ARM but pure royalty/license — the silent picks-and-shovels on every AI server.
2026-05-18 $SNPS · Synopsys
Synopsys (SNPS) — the EDA + IP duopoly that designs every AI accelerator
Synopsys is the largest EDA vendor and the largest commercial IP catalog (~4500 titles). Every NVIDIA, AMD, hyperscaler ASIC, and ARM-based server CPU is designed in Synopsys tooling. ANSYS $35B acquisition closed 2025.
2026-05-15 $ALAB · Astera Labs
Astera Labs (ALAB) — the first pure-play public bet on AI rack interconnect IP
ALAB ships four product lines that wire the AI rack — PCIe retimers, CXL memory controllers, Smart Cable Modules, and the new Scorpio Gen6 fabric switch. Picks-and-shovels for hyperscale buildouts.
2026-05-15 $CRDO · Credo Technology
Credo (CRDO) — AECs displaced optical at 800G. The 1.6T fight is the next bottleneck.
CRDO ships Active Electrical Cables (AECs) that replaced expensive optical interconnects at 800G — Amazon is the concentrated customer. The open question: does the AEC cost curve hold at 1.6T as optical regains ground?