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NVIDIA and TSMC Push AI Deep Into the Fabs: cuLitho Cuts Lithography Cost 20-50%, FabTwin Goes Digital

Read this because Not the capex headline: NVIDIA is selling compute into the supply chain that builds NVIDIA's own chips. cuLitho's 20-50% litho cost/cycle-time cut is the load-bearing number — it gates how fast and cheaply sub-2nm wafers reach volume. A vertical loop.

At GTC Taipei, TSMC adopted NVIDIA's CUDA-X stack across lithography, simulation and inspection, with cuLitho cutting litho cost up to 50%.

AMD's 256-core EPYC "Venice" is the first HPC chip to ramp on TSMC 2nm

Read this because Everyone watches the GPU. But AI clusters still need a host CPU to feed them, and AMD just put a 256-core server part on the most advanced node before anyone else. The lever here is efficiency at the power wall — and a quiet Arizona on-shoring story riding alongside it.

AMD is ramping EPYC "Venice" on TSMC 2nm (May 21) — a 256-core/512-thread part, the industry's first HPC product on the node, 70%+ uplift over Turin.

TSMC: $31.3B capex approved, $20B injected into Arizona, 53% to advanced nodes

Read this because Track the front-end-vs-back-end capex ratio, not the headline dollar figure. A 53% shift to leading-edge nodes is what decides whether next-gen Blackwell/MI400 ships on schedule — and therefore your 2027 inference cost curve.

5/12 board: $31.3B capex + $20B Arizona injection. Advanced front-end now 53% of capex (37% in 2024-25) — direct read on AI accelerator demand.

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